... the materials go through the T g from a glassy to a rubbery state ( 5 ). A series of industry standard reliability stress testing was employed in order to verify the reliability of the underfill material. For the plastic package, the industry proposed the following tests. The package...

... computational model for the simulation of practical epoxy molding compound encapsulation. 12 08 2007 28 09 2009 04 03 2010 04 03 2010 encapsulation finite difference methods integrated circuit packaging moulding plastic packaging semiconductor process modelling two-phase flow...

... PWBs during convective reflow processes. 13 01 2008 05 11 2008 01 04 2009 ball grid arrays chip scale packaging plastic packaging Over the past several decades, electronic packaging technology has been evolving rapidly. The next generation packaging involves dramatic...

... the shear deformation of the FC-CBGA package in the ATC test is larger. On the other hand, for plastic packages, shear strain dominance is not true. Due to the higher rigidity and smaller CTE for the chip compared to those of the plastic substrate, the package warps significantly and it imposes both shear...

... 24 04 2007 moisture plastic packaging 2 Moisture absorbed in plastic packages has detrimental effects on package reliability. It degrades the critical mechanical properties of polymers, such as adhesion strength, toughness, etc. ( 1 ), and produces stresses caused by the mismatch...

... Volume Effects ,” Proceedings of the Surface Mount International Conference , San Jose, CA , Aug. 25–27, pp. 315 – 324 . ball grid arrays finite element analysis plastic packaging printed circuits reliability shock wave effects Electronic products may be subjected to shock...

... temperature distribution and different coefficient of thermal expansion (CTE) of each component make the package deform differently than the case of uniform temperature in ATC. Higher substrate CTE in a plastic package generates double curvature in the package deformation and transfers higher stresses...

...Man-Lung Sham; Jang-Kyo Kim Polymeric encapsulant is widely used to protect the integrated circuit chips and thus to enhance the reliability of electronic packages. Residual stresses are introduced in the plastic package when the polymer is cooled from the curing temperature to ambient, from which...

.... Our target is to characterize this polymer low- k dielectric film (trademark name SiLK, by Dow Chemical), by considering time- and temperature dependent behavior. thin films polymer films plastic packaging integrated circuit packaging integrated circuit interconnections...

... ball grid arrays plastic packaging chip-on-board packaging flip-chip devices integrated circuit packaging thermal management (packaging) thermal conductivity natural convection forced convection thermal resistance Flip-chip plastic ball grid array (FC-PBGA) packages are fast becoming...

... Absorption and Mechanical Performance of Surface Mountable Plastic Packages ,” in Proceedings of the 38th Electronics Components Conference , pp. 49 – 58 . Frémont , H. , Delétage , J. Y. , Pintus , A. , and Danto , Y. , 2001 , “ Evaluation of the Moisture Sensitivity of Molding...

...Chien-Chang Pei; Sheng-Jye Hwang The plastic packaging process for integrated circuits is subject to several fabrication defects. For packages containing leadframes, three major defects may occur in the molding process alone, namely, incomplete filling and void formation, wire sweep, and paddle...

... software and techniques. Manzione , L. T. , 1990 , Plastic Packaging of Microelectronic Devices , Van Nostrand , New York. Nguyen , L. T. , Danker , A. , Santhiran , N. , and Shervin , C. R. , 1992 , “ Flow Modeling of Wire Sweep During Molding of Integrated...

..., Manuf. Technol. 0148-6411 , 16 , pp. 550 – 554 . Kawamura , N. , Kawakami , T. , Matsumoto , K. , Sawada , K. , and Taguchi , H. , 1993 , “ Structural Integrity Evaluation for a Plastic Package during the Soldering Process ,” Proc. 1993 ASME International Electronics...

... stress analysis thermal stress cracking temperature distribution plastic packaging Flip chip (FC) technology can achieve the highest ratio of active silicon surface area since it does not employ the peripheral wire bonding. In this way, it can be used to achieve a very large number of fine...

...Takehiro Saitoh; Hidehito Matsuyama; Masayuki Toya Using Kr 85 radioactive tracer techniques, initial sites of edge delaminations occurring during temperature cyclic tests in large-scale integrated circuit (LSI) plastic packages with either Cu alloy or alloy 42 leadframes are experimentally...

... , V. P. , and Azar , K. , 1995 , “ Achieving Accurate Thermal Characterization Using a CFD Code—Case Study of Plastic Packages ,” IEEE Trans. Compon., Packag. Manuf. Technol., Part A , 18 , pp. 732 – 738 . Gopalakrishna, S., 1991, “Numerical and Experimental Study of Forced Convection...

... Congress, New York, NY, November 11–16, 2001. Manuscript received at ASME Headquarters, Sept. 2002. Associate Editor: J. Lau. 11 November 2001 01 Sep 2002 17 09 2003 plastic packaging ball grid arrays thermal stress cracking soldering finite element analysis modelling...

... thermal expansion integrated circuit modelling finite element analysis plastic packaging optical fibre theory thermal stress cracking It has been shown 40 41 that thermally induced elastic stresses in sufficiently large assemblies do not increase with a further increase in the assembly size...

... Packaging Division for publication in the JOURNAL OF ELECTRONIC PACKAGING . Manuscript received by the EPPD Division, March 19, 2002. Associate Editor: Y.-H. Pao. 19 March 2002 14 03 2003 plastic packaging assembling circuit reliability failure analysis ball grid arrays surface...